Resumes
Resumes
Location:
Portland, OR
Industry:
Semiconductors
Work:
Intel since May 2001
Design Engineer
Design Engineer
Education:
University of Minnesota-Twin Cities 2000 - 2001
MS, Electrical and Electronics Engineering Anna University 1996 - 2000
Bachelor of Science (BS), Electrical and Electronics Engineering
MS, Electrical and Electronics Engineering Anna University 1996 - 2000
Bachelor of Science (BS), Electrical and Electronics Engineering
Skills:
Static Timing Analysis
Physical Design
Verilog
Vlsi
Rtl Design
Timing Closure
Microprocessors
Soc
Ic
Processors
Eda
Semiconductors
Debugging
Computer Architecture
System on A Chip
Very Large Scale Integration
Asic
Application Specific Integrated Circuits
Hardware Architecture
Integrated Circuit Design
Low Power Design
Cmos
Physical Design
Verilog
Vlsi
Rtl Design
Timing Closure
Microprocessors
Soc
Ic
Processors
Eda
Semiconductors
Debugging
Computer Architecture
System on A Chip
Very Large Scale Integration
Asic
Application Specific Integrated Circuits
Hardware Architecture
Integrated Circuit Design
Low Power Design
Cmos