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Paul Andrew Jolly

from Rescue, CA
Age ~53

Paul Jolly Phones & Addresses

  • 3920 Ridgewood Ct, Rescue, CA 95672
  • Kirkwood, CA
  • Markleeville, CA
  • 4014 Berry Rd, Shingle Springs, CA 95682
  • Cameron Park, CA
  • Fair Oaks, CA
  • Salem, IN
  • Los Gatos, CA
  • Austin, TX
  • Raleigh, NC
  • El Dorado, CA

Resumes

Resumes

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Paul Jolly

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Paul Jolly

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Paul Jolly

Location:
United States

Business Records

Name / Title
Company / Classification
Phones & Addresses
Paul Donald Jolly
M
Round Hill Fitness Center, LLC
100 Mcfaul Way, Zephyr Cove, NV 89448

Publications

Us Patents

Circuit And Method For Transferring Low Frequency Signals Via High Frequency Interface

US Patent:
7222199, May 22, 2007
Filed:
Mar 31, 2004
Appl. No.:
10/814106
Inventors:
Paul A. Jolly - Rescue CA, US
Ronald W. Swartz - Granite Bay CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 5/06
US Classification:
710 60, 709233, 710305, 710106
Abstract:
An interface operates at an operating frequency. The interface includes transmitters and receivers that operate within the operating frequency of the interface. The interface also includes circuit elements to allow transmission of signals across the interface in which the signals have a frequency lower than the operating frequency of the interface.

Mapping Sdvo Functions From Pci Express Interface

US Patent:
7840714, Nov 23, 2010
Filed:
Dec 24, 2003
Appl. No.:
10/746023
Inventors:
Sylvia J. Downing - El Dorado Hills CA, US
Paul A. Jolly - Rescue CA, US
Adam H. Wilen - Folsom CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 3/00
US Classification:
710 2
Abstract:
An embodiment of the present invention is a technique to map pins on an interface connector to signals for a digital display. A first group of signal traces maps transmitter differential pairs pins in a first group of lanes on the interface connector compatible with a first interface standard to video output points corresponding to video output signals of a first video port compatible with a second interface standard. A second group of signal traces maps presence detect pins in the first group of lanes on the interface connector to control signal points corresponding to control signals of the first video port compatible with the second interface standard. A third group of signal traces maps receiver differential pairs pins in the first group of lanes on the interface connector to video input points corresponding to video input signals of the first video port compatible with the second interface standard.

Delivering Pixels Received At A Lower Data Transfer Rate Over An Interface That Operates At A Higher Data Transfer Rate

US Patent:
20060061517, Mar 23, 2006
Filed:
Sep 23, 2004
Appl. No.:
10/950211
Inventors:
Paul Jolly - Rescue CA, US
Sylvia Downing - El Dorado Hills CA, US
Richard Jensen - Fair Oaks CA, US
International Classification:
G09G 5/00
US Classification:
345001100
Abstract:
A number of pixels are received at a pixel rate that corresponds to a lower data transfer rate. The received pixels are delivered for display on a display device, over an interface that operates at a higher data transfer rate. These pixels are delivered as part of a stream that includes one or more codes that have been inserted between each adjacent pair of pixels so that the pixels in the stream are still delivered at the pixel rate. Other embodiments are also described and claimed.

Delivering Pixels Received At A Lower Data Transfer Rate Over An Interface That Operates At A Higher Data Transfer Rate

US Patent:
20090189910, Jul 30, 2009
Filed:
Apr 2, 2009
Appl. No.:
12/417525
Inventors:
Paul A. Jolly - Rescue CA, US
Sylvia J Downing - El Dorado Hills CA, US
Richard Jensen - Fair Oaks CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06T 1/20
US Classification:
345506
Abstract:
A number of pixels are received at a pixel rate that corresponds to a lower data transfer rate. The received pixels are delivered for display on a display device, over an interface that operates at a higher data transfer rate. These pixels are delivered as part of a stream that includes one or more codes that have been inserted between each adjacent pair of pixels so that the pixels in the stream are still delivered at the pixel rate. Other embodiments are also described and claimed.

System And Method Of Aligning Images For Display Devices

US Patent:
6597373, Jul 22, 2003
Filed:
Jan 7, 2000
Appl. No.:
09/478993
Inventors:
Ashutosh Singla - Fair Oaks CA
Richard W. Jensen - Fair Oaks CA
Kim A. Meinerth - Granite Bay CA
Paul A. Jolly - Cameron Park CA
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G09G 500
US Classification:
345698, 345100, 345213
Abstract:
A display controller that includes a controller adapted to receive images selectable in real-time to any of a two or more of differing scanning resolutions, adapted to receive information regarding a fixed scanning resolution of a display device, and adapted to generate image borders taking into consideration the information of the fixed scanning resolution and a currently selected one of the two or more differing scanning resolutions, in order to control placement of the images on the display device.
Paul Andrew Jolly from Rescue, CA, age ~53 Get Report