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Greg Topham Phones & Addresses

  • Albuquerque, NM
  • 1301 Anderson Dr, Batavia, IL 60510

Work

Company: Transcore Feb 2008 Position: Sr. test engineer

Education

Degree: BSET School / High School: Ohio Institute of Technology 1975 to 1978 Specialities: Electronic Engineering

Skills

Testing • Electronics • Software Development • Automation • Visual Basic • Manufacturing • Hardware • Process Improvement • Test Automation • Embedded Systems • Sql • Test Equipment • Debugging • Electrical Engineering • Troubleshooting • Pcb Design • Analog • Quality Assurance • C • Access • Test Management • Hardware Architecture • Software Documentation • Analysis • Microchip Pic • Computer Hardware • Sdlc • Microsoft Sql Server • Windows • Vb.net • Rfid

Industries

Electrical/Electronic Manufacturing

Resumes

Resumes

Greg Topham Photo 1

Senior Test Engineer

Location:
San Diego, CA
Industry:
Electrical/Electronic Manufacturing
Work:
TransCore since Feb 2008
Sr. Test Engineer

Westell Jan 1997 - Jan 2008
Sr. Staff Eng

USR Mar 1996 - Jan 1997
FT Supervisor

US Robotics 1996 - 1997
Group Leader

General Instruments Jun 1993 - Feb 1996
Project Engineer
Education:
Ohio Institute of Technology 1975 - 1978
BSET, Electronic Engineering
GBHS
Skills:
Testing
Electronics
Software Development
Automation
Visual Basic
Manufacturing
Hardware
Process Improvement
Test Automation
Embedded Systems
Sql
Test Equipment
Debugging
Electrical Engineering
Troubleshooting
Pcb Design
Analog
Quality Assurance
C
Access
Test Management
Hardware Architecture
Software Documentation
Analysis
Microchip Pic
Computer Hardware
Sdlc
Microsoft Sql Server
Windows
Vb.net
Rfid

Publications

Us Patents

Flash Programmer For Programming Nand Flash And Nor/Nand Combined Flash

US Patent:
20070258288, Nov 8, 2007
Filed:
Jun 15, 2006
Appl. No.:
11/453661
Inventors:
Greg Amidon - Schaumburg IL, US
Samil Asim Addemir - Naperville IL, US
Greg Topham - Batavia IL, US
Assignee:
Westell Technologies, Inc. - Aurora IL
International Classification:
G11C 16/04
US Classification:
36518517
Abstract:
A method and system for implementing NAND programming of flash devices during in-circuit testing is described. A flash programmer may receive a program file from an in-circuit tester and device information from a NAND flash device, including information regarding bad cells. The flash programmer converts the program file to account for the bad cells and then programs the NAND flash device with the converted program file. The ability of the flash programmer to translate between the in-circuit tester and a unit under test also allows for more efficient programming of other flash devices.

Parallel Programming Of Flash Memory During In-Circuit Test

US Patent:
20070258298, Nov 8, 2007
Filed:
Jun 15, 2006
Appl. No.:
11/453632
Inventors:
Greg Amidon - Schaumburg IL, US
Samil Asim Addemir - Naperville IL, US
Greg Topham - Batavia IL, US
Assignee:
Westell Technologies, Inc. - Aurora IL
International Classification:
G11C 16/06
G11C 11/34
G11C 29/00
G11C 7/00
G11C 16/04
US Classification:
365201, 36518509, 36518528
Abstract:
A method and system for parallel programming flash devices during in-circuit testing is described. A parallel processing device is located in a test fixture of an In-Circuit Tester (ICT) for each printed circuit board (PCB) connected to the test fixture. The parallel processing device controls the communications between the ICT and the PCB. The parallel processing device facilitates parallel programming of flash devices that passed in-circuit testing. The parallel processing device prevents programming of flash devices that failed in-circuit testing.
Greg J Topham from Albuquerque, NM Get Report