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Codrut Radulescu Phones & Addresses

  • West Orange, NJ
  • Dumont, NJ
  • Closter, NJ
  • Bridgewater, NJ
  • Bethlehem, PA
  • Hillsdale, NJ
  • Pearl River, NY
  • Mahwah, NJ
  • Berlin, NJ
  • 65 Longview St, West Orange, NJ 07052

Work

Company: Sync labs llc 2007 Position: President

Education

School / High School: Rutgers University School of Law - Newark

Ranks

Licence: New York - Currently registered Date: 2012

Industries

Telecommunications

Specialities

Business • Intellectual Property

Professional Records

Lawyers & Attorneys

Codrut Radulescu Photo 1

Codrut Radu Radulescu, Newark NJ - Lawyer

Address:
Sync Labs LLC
105 Lock St Ste 211, Newark, NJ 07103
(973) 536-2608 (Office)
Licenses:
New York - Currently registered 2012
Education:
Rutgers Newark
Codrut Radulescu Photo 2

Codrut Radulescu - Lawyer

Specialties:
Business
Intellectual Property
ISLN:
922760182
Admitted:
2011

Resumes

Resumes

Codrut Radulescu Photo 3

President Phoenix Labs Llc

Position:
President at Sync Labs LLC
Location:
Greater New York City Area
Industry:
Telecommunications
Work:
Sync Labs LLC since 2007
President

Agere Systems Apr 2002 - Jun 2007
SMTS

Transwitch Apr 2002 - May 2002
Consultant

Innovance Networks 2001 - 2002
HW Team Lead

Fujitsu Network Communications Sep 1997 - Jan 2001
Team Lead HW development
Education:
Rutgers University School of Law - Newark
Universitatea 'Politehnica' din Bucuresti
MS, Electronics and Telecommunications

Business Records

Name / Title
Company / Classification
Phones & Addresses
Codrut Radulescu
Sync Labs, LLC
Radiotelephone Communication
105 Lck St, Newark, NJ 07103
Codrut R Radulescu
Managing
PHOENIX LABS, LLC
1322 SE 17 St, Fort Lauderdale, FL 33316
1007 Sunny Slope Rd, Bridgewater, NJ 08807

Publications

Us Patents

Methods And Apparatus For Unidirectional Timing Message Transport Over Packet Networks

US Patent:
7839897, Nov 23, 2010
Filed:
Sep 29, 2006
Appl. No.:
11/536989
Inventors:
Codrut Radu Radulescu - Bethlehem PA, US
Assignee:
Agere Systems Inc. - Allentown PA
International Classification:
H04J 3/06
US Classification:
370503
Abstract:
Methods and apparatus for synchronizing a first clock of a transmit node and a second clock of receive node in a packet network are provided. Consecutive intervals of time-stamped packets transferred from the transmit node to the receive node are selected. The consecutive intervals have a difference in delay noise within a defined acceptance window. A correction factor is determined for the second clock in accordance with transmit and receive time stamps of transferred time-stamped packets bounding the consecutive intervals. The correction factor is applied to the second clock to synchronize the second clock of the receive node with the first clock of the transmit node.

Methods And Apparatus For Reorganizing Cells Buffered After Transmission

US Patent:
7924857, Apr 12, 2011
Filed:
Jan 5, 2006
Appl. No.:
11/326047
Inventors:
Deepak Kataria - Edison NJ, US
Codrut Radu Radulescu - Hillsdale NJ, US
Assignee:
Agere Systems Inc. - Allentown PA
International Classification:
H04L 12/56
US Classification:
370412, 370368, 370394, 370420, 370249, 711162
Abstract:
A method and apparatus of reorganizing cells received over data communication lines at a receive node is provided. The cells have an initial order identified by monotonically increasing sequence identifiers. The receive node has buffers associated with respective ones of the communication lines. Each of the buffers has an output position. A cell having a smallest sequence identifier is detected from one or more cells at the output positions of the buffers. It is determined if the smallest sequence identifier is sequentially consecutive to a specified sequence identifier. If the smallest sequence identifier is sequentially consecutive to the specified sequence identifier, the cell having the smallest sequence identifier is dequeued from an output position of one of the buffers and the specified sequence identifier is redefined as the smallest sequence identifier.

Network Timing Synchronization Systems

US Patent:
8416812, Apr 9, 2013
Filed:
Sep 21, 2009
Appl. No.:
12/586321
Inventors:
Codrut Radu Radulescu - South Orange NJ, US
International Classification:
H04J 3/06
H04L 7/00
US Classification:
370503, 375354
Abstract:
A method and means synchronize timing of a follower system to a reference system. A Hierarchical CFF function (“HCFF”) is applied to a set of Correction Factor Functions types (“CFFs”) or a set of other HCFF. Each CFF type uses the same input data set specific to that type and generates at least one Correction Factor Solution (“CFS”) for each of the CFF, wherein the CFS consists of only CF or the CFS consists of both i) CF and ii) a SACF. The HCFF takes as input a set of CFS and generates at least one CFS, wherein the CFS consist of only the CF, or the CFS consists of both the i) CF and ii) a SACF.

Phy Bandwidth Estimation From Backpressure Patterns

US Patent:
8467313, Jun 18, 2013
Filed:
Feb 28, 2013
Appl. No.:
13/781011
Inventors:
Codrut Radu Radulescu - Bridgewater NJ, US
International Classification:
G01R 31/08
H04L 12/42
US Classification:
370252, 370449
Abstract:
The present invention provides a system and method of determining available bandwidth at a physical layer (PHY) device at a server on a broadband network. A link layer controller of a master administrator adaptively polls a PHY device over a set of time intervals. During polling, the controller places a PHY device's address on a line of a bus and awaits a response from the PHY device. Based upon the response from the PHY device, the administrator can determine whether the PHY device has available bandwidth. The link layer controller uses this information to recalculate its polling scheme to better make use of the available bandwidth over the shared transmission medium to which each PHY device in the network is attached.

Methods And Apparatus For Minimizing Sequence Identifier Difference Of Simultaneously Transmitted Cells

US Patent:
20070025356, Feb 1, 2007
Filed:
Jul 29, 2005
Appl. No.:
11/193799
Inventors:
Deepak Kataria - Edison NJ, US
Codrut Radulescu - Hillsdale NJ, US
International Classification:
H04L 12/56
US Classification:
370395300
Abstract:
A method of minimizing SID difference of simultaneously transmitted cells in two or more data communication lines is provided. A data transmission speed of each of the two or more data communication lines is identified. A fullness threshold of at least one buffer of two or more buffers in a transmit node is configured in relation to a size of a data cell for transmission. The two or more buffers correspond to respective ones of the two or more data communication lines. The at least one buffer communicates with a given one of the two or more data communication lines having a data transmission speed slower than another of the two or more data communication lines. One or more data cells for transmission are assigned to the two or more buffers of the two or more data communication lines at the transmit node. The one or more data cells are transmitted from the transmit node to a receive node in accordance with the data transmission speeds of the two or more data communication lines. The fullness threshold of the at least one buffer controls assignment of data cells to the at least one buffer during data cell transmission on the given data communication line and minimizes SID difference of simultaneously transmitted cells in the two or more data communication lines.

Phy Bandwidth Estimation From Backpressure Patterns

US Patent:
20090073889, Mar 19, 2009
Filed:
Sep 19, 2007
Appl. No.:
11/857850
Inventors:
Codrut Radu Radulescu - Bridgewater NJ, US
Assignee:
AGERE SYSTEMS INC. - Allentown PA
International Classification:
G06F 11/00
H04L 12/403
US Classification:
370252, 370449
Abstract:
The present invention provides a system and method of determining available bandwidth at a physical layer (PHY) device at a server on a broadband network. A link layer controller of a master administrator adaptively polls a PHY device over a set of time intervals. During polling, the controller places a PHY device's address on a line of a bus and awaits a response from the PHY device. Based upon the response from the PHY device, the administrator can determine whether the PHY device has available bandwidth. The link layer controller uses this information to recalculate its polling scheme to better make use of the available bandwidth over the shared transmission medium to which each PHY device in the network is attached.

Synchronized Exchange System

US Patent:
20170330278, Nov 16, 2017
Filed:
Sep 8, 2015
Appl. No.:
15/509352
Inventors:
Codrut Radu RADULESCU - West Orange NJ, US
International Classification:
G06Q 40/04
H04L 29/08
H04L 12/26
Abstract:
A method for synchronous processing exchange orders, comprising: creating a first batch of orders by accumulating exchange orders received within a first time period, TP1; creating a second batch of orders by accumulating exchange orders received within a second time period, TP2; and processing the orders from the first batch within the second time period, TP2.
Codrut R Radulescu from West Orange, NJ, age ~66 Get Report