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Allan J Christie

from Fremont, CA
Age ~60

Allan Christie Phones & Addresses

  • 4455 Burney Way, Fremont, CA 94538 (510) 490-5443 (510) 573-3175
  • Mount Dora, FL
  • 4455 Burney Way, Fremont, CA 94538 (530) 414-0900

Work

Company: Broadcom Mar 1999 to Nov 2011 Position: Senior director, software engineering, systems

Education

Degree: Bachelors, Bachelor of Science School / High School: University of Alberta 1982 to 1986 Specialities: Computer Science

Skills

Ethernet • Device Drivers • Semiconductors • Asic • Embedded Systems • Operating Systems • System Architecture • Soc • Debugging • Processors • Embedded Software • Perl • Ic • Firmware • Wireless

Languages

English

Interests

Boating • Cooking • Exercise • Investing • Outdoors • Electronics • Home Improvement • Reading • Gourmet Cooking • Music • Sports • Movies • Home Decoration

Emails

Industries

Computer Networking

Resumes

Resumes

Allan Christie Photo 1

Allan J Christie

Location:
4455 Burney Way, Fremont, CA 94538
Industry:
Computer Networking
Work:
Broadcom Mar 1999 - Nov 2011
Senior Director, Software Engineering, Systems

Sgi 1993 - 1999
Mts

Amdahl 1991 - 1993
Mts

Amdhal 1991 - 1993
Mts

Myrias Research Corporation 1987 - 1990
Mts
Education:
University of Alberta 1982 - 1986
Bachelors, Bachelor of Science, Computer Science
Skills:
Ethernet
Device Drivers
Semiconductors
Asic
Embedded Systems
Operating Systems
System Architecture
Soc
Debugging
Processors
Embedded Software
Perl
Ic
Firmware
Wireless
Interests:
Boating
Cooking
Exercise
Investing
Outdoors
Electronics
Home Improvement
Reading
Gourmet Cooking
Music
Sports
Movies
Home Decoration
Languages:
English

Publications

Us Patents

System And Method For Shared Memory Protection In A Multiprocessor Computer

US Patent:
6381681, Apr 30, 2002
Filed:
Sep 30, 1999
Appl. No.:
09/410120
Inventors:
David E. McCracken - San Francisco CA
Allan James Christie - Fremont CA
James A. Stuart Fiske - Palo Alto CA
Assignee:
Silicon Graphics, Inc. - Mountianview CA
International Classification:
G06F 1200
US Classification:
711152, 711153
Abstract:
A memory protection system for shared memory in a multiprocessor computer is provided that comprises a multiprocessor computer ( ) having a plurality of processor regions and a plurality of memory pages ( ). Each processor region includes one or more processors ( ). Each processor ( ) includes a cache ( ), and each memory page ( ) includes one or more cache lines ( ) for coupling to the cache ( ) of processors ( ) within the plurality of processor regions using the memory page ( ). Each memory page ( ) includes a set of protection bits ( ) associated with each processor region in the plurality of processor regions. The set of protection bits ( ) includes an acquire protection bit ( ) for each processor region in the plurality of processor regions. The acquire protection bit ( ) determines whether the associated processor is enabled to perform acquire operations on the memory page ( ). The set of protection bits ( ) also includes a release protection bit ( ) for each processor region in the plurality of processor regions.

Multiple Virtual Channels For Use In Network Devices

US Patent:
8116203, Feb 14, 2012
Filed:
May 31, 2007
Appl. No.:
11/806427
Inventors:
Shiri Kadambi - Los Altos Hill CA, US
Shekhar Ambe - San Jose CA, US
Mohan Kalkunte - Sunnyvale CA, US
Sandeep Relan - Bangalore, IN
Allan Christie - Fremont CA, US
Uri Elzur - Irvine CA, US
Martin Lund - Menlo Park CA, US
Daniel Talayco - San Jose CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H04L 1/00
H04J 1/16
US Classification:
370235, 370230, 370231, 370236
Abstract:
A method for establishing a virtual channel between network devices is disclosed. In the case of a local network device establishing a virtual channel with a remote network device, a virtual channel request message is sent from the local network device to the remote network device. A virtual channel acknowledgement message and a remote capability list are received and a virtual channel resume message and a local capability list are sent. The virtual channel is then enabled. In the case of a remote network device establishing a virtual channel with a local network device, a virtual channel request message is received from a local network device by a remote network device. A virtual channel acknowledgement message and a remote capability list are sent and a virtual channel resume message and a local capability list are received. The virtual channel is then enabled.

Multiple Logical Channels For Use In Network Devices

US Patent:
8493857, Jul 23, 2013
Filed:
Jan 14, 2011
Appl. No.:
13/006968
Inventors:
Shiri Kadambi - Los Altos Hills CA, US
Shekhar Ambe - San Jose CA, US
Mohan Kalkunte - Sunnyvale CA, US
Sandeep Relan - Bangalore, IN
Allan Christie - Fremont CA, US
Uri Elzur - Irvine CA, US
Martin Lund - Menlo Park CA, US
Daniel Talayco - San Jose CA, US
Assignee:
Broadcom Corporation - Irvine CA
International Classification:
H04L 12/26
US Classification:
370231
Abstract:
A method for establishing a virtual channel between network devices is disclosed. In the case of a local network device establishing a virtual channel with a remote network device, a virtual channel request message is sent from the local network device to the remote network device. A virtual channel acknowledgement message and a remote capability list are received and a virtual channel resume message and a local capability list are sent. The virtual channel is then enabled. In the case of a remote network device establishing a virtual channel with a local network device, a virtual channel request message is received from a local network device by a remote network device. A virtual channel acknowledgement message and a remote capability list are sent and a virtual channel resume message and a local capability list are received. The virtual channel is then enabled.

Stacking Into Bcmx

US Patent:
20060253557, Nov 9, 2006
Filed:
May 8, 2006
Appl. No.:
11/429288
Inventors:
Daniel Talayco - Mountain View CA, US
Brian Baird - Pleasanton CA, US
Allan Christie - Fremont CA, US
International Classification:
G06F 15/177
US Classification:
709220000
Abstract:
A method, system and apparatus for decoupling devices in a network for use by a system-wide application. The invention includes accumulating configuration information for the network, wherein the network includes a plurality of units, and each of the units includes a processor and at least one switch device. The invention further includes analyzing the configuration information and determining a logical configuration for the network based on the analyzed configuration information. The invention further includes virtually attaching a remote switch device to the network.

Multiple Logical Channels For Use In Network Devices

US Patent:
20130301410, Nov 14, 2013
Filed:
Jul 16, 2013
Appl. No.:
13/943291
Inventors:
Shekhar Ambe - San Jose CA, US
Mohan Kalkunte - Sunnyvale CA, US
Sandeep Relan - Bangalore, IN
Allan Christie - Fremont CA, US
Uri Elzur - Irvine CA, US
Martin Lund - Menlo Park CA, US
Daniel Talayco - San Jose CA, US
International Classification:
H04L 12/851
US Classification:
370231
Abstract:
A method for establishing a virtual channel between network devices is disclosed. In the case of a local network device establishing a virtual channel with a remote network device, a virtual channel request message is sent from the local network device to the remote network device. A virtual channel acknowledgement message and a remote capability list are received and a virtual channel resume message and a local capability list are sent. The virtual channel is then enabled. In the case of a remote network device establishing a virtual channel with a local network device, a virtual channel request message is received from a local network device by a remote network device. A virtual channel acknowledgement message and a remote capability list are sent and a virtual channel resume message and a local capability list are received. The virtual channel is then enabled.

Unified Re-Map And Cache-Index Table With Dual Write-Counters For Wear-Leveling Of Non-Volatile Flash Ram Mass Storage

US Patent:
60000066, Dec 7, 1999
Filed:
Aug 25, 1997
Appl. No.:
8/918203
Inventors:
Ricardo H. Bruce - Union City CA
Rolando H. Bruce - South San Francisco CA
Earl T. Cohen - Fremont CA
Allan J. Christie - Fremont CA
Assignee:
BIT Microsystems, Inc. - Fremont CA
International Classification:
G06F 1210
US Classification:
711103
Abstract:
A flash-memory system provides solid-state mass storage as a replacement to a hard disk. A unified re-map table in a RAM is used to arbitrarily re-map all logical addresses from a host system to physical addresses of flash-memory devices. Each entry in the unified re-map table contains a physical block address (PBA) of the flash memory allocated to the logical address, and a cache valid bit and a cache index. When the cache valid bit is set, the data is read or written to a line in the cache pointed to by the cache index. A separate cache tag RAM is not needed. When the cache valid bit is cleared, the data is read from the flash memory block pointed to by the PBA. Two write count values are stored with the PBA in the table entry. A total-write count indicates a total number of writes to the flash block since manufacture. An incremental-write count indicates the number of writes since the last wear-leveling operation that moved the block.
Allan J Christie from Fremont, CA, age ~60 Get Report